An Optimized SM Fault-Tolerant Control Method For MMC-based HVDC Applications

Abstract

Modular Multilevel Converters (MMCs) are becoming a realistic alternative to the conventional voltage source converters (VSCs) for medium voltage (MV) and high voltage direct current (HVDC) applications. The MMC topologies utilize a large number of submodules (SMs) cascaded in series per phase arm to achieve desired high voltage levels. These SMs can be as high as 512 to synthesize a very low total harmonic distortion (THD) (e.g. < 0.1%) of the MMC AC side interface voltage. However, malfunction of any SM results in undesirable waveforms, and it may result in unstable operation of the entire MMC system. This paper proposes an optimized SM fault ride-through method and a capacitor voltage balancing (CVB) control for MMC-based HVDC applications. The proposed method can effectively improve the MMC performance and reliability under SM faults. The proposed approach is implemented in the Real-Time Digital Simulator (RTDS) and MMC support units based on FPGA boards. The results show that the proposed method can efficiently keep the MMC operation as normal and provide satisfactory performance under SM faults.