Abstract
Providing end-to-end security is vital for most networks. Emerging quantum computers make it necessary to design secure crypto-systems against quantum attacks. Binary Ring Learning With Error (Ring-Bin LWE) is a Lattice-based cryptography that is hard to solve by quantum computers. Also, this algorithm does not have costly operations in terms of area, making Ring-Bin LWE a suitable algorithm for resource-constraint devices. This work presents a lightweight hardware implementation of Ring-Bin LWE. In the proposed design, a new multiplication method and design for Ring-Bin LWE is introduced which results in latency reduction by a factor of two. Using column-based multiplication, our design processes two consecutive coefficients in each cycle. The architecture is designed based on the proposed multiplication and contains one specific register bank with two sub-bank registers. The design is implemented on the FPGA platforms. The implementation results show an impressive improvement in execution time and Area-Time metrics over previous similar works.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
