Abstract

An approach is demonstrated to improve the performance of conventional SOI JLT (Silicon-on-Insulator Junctionless Transistor) i.e., to increase the on-off ratio with an effort to improve the self-heating effect. A small germanium pocket is introduced in the channel region resulting in three different regions namely source, pocket and channel-drain. The behavior of SOI JLT with different source materials is performed to determine the most favorable one. The doping concentrations of all three regions are also optimized to achieve superior performance. Later all the designs are compared with the reference SOI JLT to choose the optimum one. The device with SiGe as source and Ge in the pocket region is considered as the potential model as it is predicting excellent on-off ratio (order of 106). The size and position of the pocket is evaluated by observing the device characteristics. Further, the importance of SHE (Self Heating Effect) in SOI JLT is demonstrated. To reduce the lattice temperature, one imperative solution is proposed in the SOI platform. Various analysis like analog/RF, temperature analysis including the evaluation of ZTC (Zero Temperature Coefficient) are performed for the optimized device architecture.

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