An optimization approach for primary frequency regulation reserve capacity considering frequency deviation for sending end of asynchronous interconnection system

Abstract

New materials and related new equipment are increasingly important to maintain the safety and stability of the asynchronous interconnection systems. DC lines equipped with Frequency Limit Controller (FLC) are able to quickly balance power fluctuation and limit frequency deviation. However, the frequency stability problem, especially in the sending end system characteristics of “large generation and small network”, still draws our attention for its significance to the gird. Based on the analysis of the primary frequency regulation principle of the power system and the impact of reserve configuration on frequency deviation in asynchronous interconnection, an optimization approach for primary frequency regulation reserve capacity, featured by the sequence quadratic programming, with the minimum quasi-steady-state frequency deviation, was proposed in this paper. The optimization idea of this approach is to arrange the reserve configuration in proportion to the unit’s adjustment coefficient and the dead zone, in order to prevent non-performance of some units while other units are sufficient. A numerical simulation indicated that, compared with the original scheme, the system frequency deviation was effectively reduced.