An optical semiconductor photonic transistor design and simulations

Abstract

This paper presents a wideband optical semiconductor Photonic Transistor (PT) and computer simulation results. The PT can be used to construct either N-valued digital photonic logic gates or binary Boolean logic gates. Digital photonic circuits can then be built using these logic gates. We used a buried stripe wave guide heterojunction microstructure for the PT. The objective of this paper is to report the results of computer simulations with different active region dimensions for the same design. Numerical experiments have shown that the same logic function can be achieved with different sizes of the PT, by setting the appropriate signal powers. However, smaller size designs have the advantage of higher speeds and low power consumptions.