Abstract

This paper discusses the design of a FPGA-based Bit Error Ratio (BER) measurement system in a serial communication link under electromagnetic emissions. The BER measurement is an important figure for the reliability of digital communication systems. Generally, the equipment involved to measure BER is prohibitively expensive. This paper demonstrates the design, construction and verification of an Open Source System (OSS), with all design files being made freely accessible to the public for use in general or highly specialized BER measurements. The methods used for programming the Hardware Description Language (HDL) modules were done as simple as possible to facilitate easy integration into experiments for academics with limited experience in HDL usage.

Highlights

  • Electromagnetic Compatibility (EMC) is a field that attracts increasing attention in research, as the consequence of a failure of any of the increasing number of data systems in everyday life may result in ever-increasing consequences

  • Many commercially available Bit Error Ratio Tester (BERT) have very high bandwidth capabilities, with even the most basic systems being capable of measuring data rates in excess of hundreds of Megabits per second (Mbps) [7]

  • A BERT must find the ratio of incorrectly transmitted bits to transmitted bits, as given by equation 1

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Summary

INTRODUCTION

Electromagnetic Compatibility (EMC) is a field that attracts increasing attention in research, as the consequence of a failure of any of the increasing number of data systems in everyday life may result in ever-increasing consequences. The cost for equipment which is capable of performing measurements of this error ratio presents a large barrier for some in the academic community as prices for such systems can reach in excess of £90,000 [6] for a basic system. Many commercially available BERTs have very high bandwidth capabilities, with even the most basic systems being capable of measuring data rates in excess of hundreds of Megabits per second (Mbps) [7]. Such high data rates are not necessarily required by every academic, such as the research presented in [8]. All of this is achieved with a budget of less than £150

DESIGN OF THE BERT
HDL MODULES
HARDWARE DESIGN
TYPICAL USAGE
OS BERT MODIFICATIONS
Differential Signalling
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