An open computational platform for low-latency real-time audio signal processing using field programmable gate arrays

Abstract

Field Programmable Gate Arrays (FPGAs) provide flexible computational architectures that are ideal for digital signal processing (DSP). With support of a NIH/NIDCD SBIR grant, we are developing an open FPGA platform for the speech, hearing, and acoustics research communities. The advantage of using FPGAs in a computational platform over conventional CPU approaches is the ability to implement low-latency high-performance signal processing with deterministic latencies. The hardware portion of the platform includes an audio codec and an Intel System-on-Chip (SoC) FPGA that contains ARM CPUs alongside the computational fabric that allows custom data plane designs. Development uses Mathwork’s Simulink that allows exploration and simulation of signal processing algorithms. Once a Simulink model has been developed to implement audio processing in either the time domain or frequency domain, VHDL code can be generated that implements the desired signal processing. The VHDL code is then implemented in the FPGA computational fabric where the FPGA functions as a real-time signal processor. We are currently soliciting ideas/feedback from the speech, hearing, and acoustic communities as to what features they would like to see in the next iteration of the open FPGA-based computational platform. [NIH/NIDCD R44DC015443: www.openspeechtools.com]