An On-Chip Sensor to Monitor NBTI Effects in SRAMs

Abstract

The increasing need to store more and more information has resulted in the fact that Static Random Access Memories (SRAMs) occupy the greatest part of Systems-on-Chip (SoCs). Therefore, SRAM's robustness is considered crucial in order to guarantee the reliability of such SoCs over lifetime. In this context, one of the most important phenomena that degrades Nano-Scale SRAMs reliability is related to Negative-Bias Temperature Instability (NBTI), which causes the memory cells aging. The main goal of this paper is to present a hardware-based approach able to monitor SRAMs' aging during the SoC's lifetime based on the insertion of On-Chip Aging Sensors (OCASs). In more detail, the proposed strategy is based on the connection of one OCAS to every SRAM column, each periodically monitoring write operations on the SRAM cells. It is important to note that in order to prevent the OCAS from aging and to reduce leakage power dissipation, the OCAS circuitry is powered-off during its idle periods. The proposed hardware-based approach has been evaluated throughout SPICE simulations using 65 nm CMOS technology and the results demonstrate the sensor's capacity to detect early aging states and therefore, guaranteeing high SRAM reliability. To conclude, a complete analysis of the sensor's overheads is presented.