Abstract

As the physical gate-count in System-On-Chip (SoC) increases and system design complexity grows steadily, it becomes more and more difficult to achieve non-intrusive and real-time debugging. Since the on-chip bus is an important SoC infrastructure that connects major hardware components, we design an AHB bus tracer to achieve non-intrusive debugging and performance analysis of the SoC. In this paper, we first research the interconnection structure and data transmission principle of AMBA AHB, and propose a bus tracing approach which can monitor the data transmission between all master and slave devices of AHB. Then we explore a data packing approach to avoid the confusion of tracing and a configurable circular trace memory to implement the on-chip caching. As a case study, we implement an AHB interconnect system for simulation verification, and the experimental results show that the bus tracer we designed can trace all information for different types of AHB transmission accurately.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.