Abstract
An LSI implementation of a programmable finite impulse response filter based on a generalized transversal filter structure is described. The overall structure is in the form of tapped and cascaded linear phase FIR subfilters which are processed in parallel. The LSI contains 52 different filters, any one of which can be selected by six external pins. Each filter is equivalent to a conventional filter with about 40-50 filter lengths, and has a maximum sampling rate of 1.11 MHz, the 5.0*5.5 mm/sup 2/ chip was fabricated using 1.5- mu m double-level metal CMOS technology. >
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