An investigation of polysilicon emitter bipolar transistors with an ozonized polysilicon/monosilicon interface

Abstract

This paper reports the development of a new polysilicon/monosilicon interface preparation technique to adjust bipolar transistor properties. The interest of this new technique is demonstrated using physical characterizations, static and dynamic measurements on a 200mm 0.5μm BiCMOS technology. I) Introduction Oxygen at the poly/mono interface significantly affects the performances of poly emitter bipolar transistors. In particular, it is well known that an interfacial oxide layer increases the current gain and emitter resistance [1]. The aim of this paper is to evaluate new techniques for interfacial oxide formation. For the first time, a thin oxide layer has been introduced at the interface between in-situ doped emitter poly and Si using two different types of ozonization processes. We discuss the experimental results obtained on devices fabricated in a 200mm 0.5μm quasi self-aligned BiCMOS technology [2], and integrating an ozonized poly/mono interface. II) Interface preparation The use of ozone (O3) is advantageous for the combustion of possible hydrocarbon residues on the silicon surface and for its passivation and stabilization in time. In order to test different interfacial oxide thicknesses, two different ozone processes have been developed: i ) The first, HF + dry O3, corresponds to an O3 gaseous treatment after the well-known wet HF last clean. The interfacial oxide was obtained in the vapor phase cleaning module of an AST machine at room temperature under 100 hPa for 60sec, and its thickness is around 0.5-0.7nm as deduced from ellipsometric measurements [3]. i i ) The second, HF + wet O3, corresponds to a wet cleaning after the classical HF last, the O3 gas being diluted in water inside the CHAMBER FLOW machine before the deposition process. The equivalent oxide thickness (measured with a fixed refraction index of 1.465) of the interfacial layer is twice that of in the previous case (1nm). Diiodomethane contact angle measurements, which are sensitive to surface properties [4], suggest that in both cases, there is oxide growth (by analogy with reference thermal oxide) (Fig.1). As shown in Fig.1, the stability of the HF+dry O3 interface is similar to that of thermal oxide, while the HF+wet O3 changes more rapidly, as does the more conventional RCA prepared interface (Fig.2). The HF+dry O3 process thus appears to be a good choice for stable thin poly/mono interfacial oxide preparation, allowing a longer delay time before polysilicon emitter deposition. Fig.1: Diiodomethane contact angle evolution in time for thermal oxide,HF+dryO3, HF+wetO3 Fig.2: Diiodomethane contact angle evolution in time for RCA, HF+dryO3, HF+wetO3 III) Experimental results In our 0.5μm BiCMOS technology the emitter window is opened by dry etching in an oxide layer (800A thickness) (superposition of deposited oxide and thermal oxide). Immediately after the interface preparation (discussed above), the wafers were loaded in the in-situ doped polysilicon reactor. The total thermal budget was 850°C/15min + 1025°C/20sec for the investigated process which had been optimized earlier for an HF interface treatment. Several characterizations were performed after device fabrication: FIB-TEM-EELS, TEM, SIMS. Fig.3 shows EELS (Electron Energy Loss Spectroscopy) spectra recorded on the three different regions of the TEM cross-section shown in Fig.4. The integral of the signal, after background subtraction, provides a quantitative evaluation of the oxygen content (identified by the 530eV ionization threshold). The data show that there is indeed more oxygen at the interface (3%) than in the poly (0.7%) or in the monosilicon (0.5%). In addition, SIMS results show an increase in the interfacial oxygen dose after ozonization (Table 1), the largest oxygen dose being obtained for the wet O3 treatment. P ho to di od e C ou nt s Si poly 2K 500 550 600 Energy Loss (eV) 0,7% 500 550 600 Si mono 2K Energy Loss (eV) 0,5% P ho to di od e C ou nt s Interface 2K 4K 500 550 600 Energy Loss (eV) 3% P ho to di od e C ou nt s Ok