An integrated scheduling and buffer management scheme for input queued switches with finite buffer space

Abstract

This paper addresses scheduling and memory management in input queued switches having finite buffer with the objective of improving the performance in terms of throughput and average delay. Most of the prior works on scheduling related to input queued switches assume infinite buffer space. In practice, buffer space being a finite resource, special memory management scheme becomes essential. Maximum weighted matching (MWM) algorithm, which is known to be the optimal in terms of throughput for infinite buffer case turns out to be sub optimal in the presence of memory limitations. We introduce a buffer management scheme called iSMM (Integrated Scheduling and Memory Management) that can be employed jointly with any deterministic iterative scheduling algorithm. We applied iSMM over iSLIP, a popular scheduling algorithm, and study its effect under various input traffic conditions. Simulation results indicate iSMM to perform better than iSLIP and MWM both in terms of throughput and delay especially under non-uniform traffic.