Abstract
This paper proposes a simplified simultaneous multithreading (SMT) architecture aiming at CPU cores of embedded SoCs for consumer applications. This architecture reduces the hardware cost and design complexity of the SMT architecture by adopting in-order execution within threads and static resource partitioning among threads. In our architecture, processor resources are divided into three types depending on their related pipeline stages and static partitioning is applied individually to each resource type. Each thread can perform its operation using the resource partition to which it belongs. Simulation results show that reasonable static partitioning reduces the hardware cost and design complexity of SMT processors while having little negative impact on or even improving performance, compared with full resource sharing.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
