An incremental evolutionary algorithm suitable for industrial platform for analog circuit design

Abstract

The design of analog circuits by evolutionary algorithm is an approach to automatic design of analog circuits. Applying the method of automatic analog circuit evolutionary design in engineering application has practical values. However, it also results in a lot of time-consuming. The purpose of this paper is to deal with the problem of time-consuming. We propose an incremental evolutionary algorithm to reduce the time complexity during the evolution. The algorithm improves the precision of simulation incrementally. A low-pass filter from the practical problem is designed by the incremental evolutionary algorithm. And experimental results show that, the algorithm is remarkable effect in the evolutionary design of industrial analog circuits. significant. Through analyzing the time complexity of evolutionary algorithm, time complexity is mainly derived from the simulation in the process of evaluating the fitness. We simulate the same circuit with different simulators. It's easy to find out that using industrial simulator takes 22 times of time- consuming than the common simulator. For an automatic circuit evolutionary design of a population size of 30 and a generation of 100, using industrial simulator takes 66000 times of time-consuming than the common simulator. Due to the high time complexity of evolving analog circuits with industrial simulator, we propose an incremental evolutionary algorithm. The basic idea of this algorithm is improving the precision of the simulator gradually in the process of evolution. In other words, use low precision in the primary stage of simulation, reduce the scale of data to decrease the time-consuming and the excepted circuit will be simulated in high precision. The remainder of this paper is organized as follows. The time complexity of analog circuit evolutionary design in industrial platform is significant. Then we explore the origin of time complexity of analog circuit evolutionary design in Cadence. And an incremental evolutionary algorithm is proposed to reduce the time complexity. This algorithm combines the alternant parameters of the simulator with the evolution of the algorithm. The time complexity is reduced by controlling the precision of the simulator to change the scale of data. Finally, the experiment of evolving the filter from practical problem is to verify that the incremental evolutionary algorithm is remarkable effect in the evolutionary design of industrial analog circuits.