Abstract
The postirradiation response of hardened and commercial CMOS devices is investigated as a function of total dose, dose rate, and annealing time and temperature. Cobalt-60 irradiation at approximately=200 rad(SiO/sub 2/)/s followed by a one-week 100 degrees C biased anneal and testing is shown to be an effective screen of hardened devices for space use. However, a similar screen and single-point test performed after Co-60 irradiation and elevated-temperature anneal cannot be generally defined for commercial devices. In the absence of detailed knowledge about device and circuit radiation response, a two-point standard test is proposed to ensure space survivability of CMOS circuits; a Co-60 irradiation and test to screen against oxide-trapped-charge-related failures, and an additional rebound test to screen against interface-trap-related failures. Testing implications for bipolar technologies are also discussed. >
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