An improved RBR image reconstruction architecture based on super-systolic techniques

Abstract

In this paper, we address and discuss the time performance improvement achieved with a novel image reconstruction hardware architecture for high-resolution array Radar/SAR imaging. The presented approach is oriented to solve the ill-conditioned inverse spatial spectrum pattern estimation problem via the efficient implementation of super-systolic arrays (SSAs) accelerator units. The co-design-oriented system is addressed to as an aggregated Robust Bayesian-Regularization and SSAs techniques for radar and SAR image reconstruction. We exemplify how this aggregated method leads to a novel real time image reconstruction system as required for newer remote sensing applications. The reported implementation results on a Virtex5 XC5VFX130T Field Programmable Gate Array reveals the significant high-performance improvement over previous works.