Abstract

An improved equivalent simulation model for a CMOS-integrated Hall plate is described in this paper. Compared with existing models, this model covers voltage dependent non-linear effects, geometrical effects, temperature effects and packaging stress influences, and only includes a small number of physical and technological parameters. In addition, the structure of this model is relatively simple, consisting of a passive network with eight non-linear resistances, four current-controlled voltage sources and four parasitic capacitances. The model has been written in Verilog-A hardware description language and it performed successfully in a Cadence Spectre simulator. The model’s simulation results are in good agreement with the classic experimental results reported in the literature.

Highlights

  • CMOS integrated Hall magnetic sensors are widely used in many practical fields.Besides directly measuring the value of magnetic field, they are usually used to indirectly measure position, distance, speed, rotational angle or an electric current [1,2]

  • The new simulation model code has been written in behavioral Verilog-A language and was tested on a Cadence Spectre simulator tool using AMS 0.8 μm CMOS technological parameters

  • The structure of the model consists of a passive network, including eight non-linear resistances, four depletion capacitances and four current-controlled voltage sources

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Summary

Introduction

CMOS integrated Hall magnetic sensors are widely used in many practical fields. Madec et al developed a compact model of a cross-shaped horizontal integrated Hall sensor [7] It uses six sub-components to accurately model the non-linear resistance, allowing for the influence of space charge region modulation due to sensor bias. It cannot consider sensitivity drifts, temperature drifts and influence of mechanical stress on offset. An accurate 8-resistance simulation model for a cross-shaped CMOS-integrated Hall plate is developed. To be conveniently used by circuit designers, this model is improved by replacing the JFETs with passive non-linear resistances and depletion capacitances It takes into account voltage dependent non-linear effects, geometrical effects, temperature effects, and packaging stress influence, etc.

The Improved Compact Model
The Structure of the Model
Rs L 2
Hall Voltage and Magnetic Sensitivities
Voltage Dependent Non-Linear Effect
Temperature Effect
Piezo-Resistance and Piezo-Hall Effects
Comparing Results of Simulation with Experimental Results
Conclusions
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