Abstract

The design and FPGA implementation of an enhanced pseudo-random bit generator based on hyperchaotic nonlinear system is presented. Three different dimensional hyperchaotic systems are adopted and numerically solved to be used as a random bit generator. The three generated bit streams are used alternately to encrypt the input plain image using stream cipher technique. A Lorenz chaotic system is adopted to randomly switch between the three generated bit streams. The designed generator has been used in the image encryption systems, where it offers 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1088</sup> possible encryption/decryption key which is huge key space compared with traditional algorithm. different image sizes are used and adopted to test the proposed system. The proposed system has been simulated and implemented on Matlab/Simulink environment and Field Programmable Gate Array board (PYNQ-Z1 board) respectively. System generator is used to generate the VHDL code that programmed the board. Simulated and implemented design have been tested with colored plain image and different tests have been carried out to test the system behavior, such as correlation of the adjacent pixels, entropy, peak signal to noise ratio. The simulation and implementation results are in a good agreement, which prove that the system is applicable and can be used for real world communication systems effectively.

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