Abstract
The use of bipolar technology in hardened electronic design requires an in-depth understanding of how the Bipolar Junction Transistor (BJT) behaves under normal electrical and radiation environments. Significant improvements in BJT process technology have been reported, and the successful use of sophisticated Computer Aided Design (CAD) tools has aided implementation with respect to specific families of hardened devices. The most advanced BJT model used to date is the Improved Gummel-Poon (IGP) model which is used in CAA programs such as the SPICE II and SLICE programs. The earlier Ebers-Moll model (ref 1 and 2) has also been updated to compare with the older Gummel-Poon model. This paper describes an adaptation of an existing computer model which incorporates the best features of both models into a new, more accurate model called the Improved Bipolar Junction Transistor model. This paper also describes a unique approach to data reduction for the B(Ic) and VBE (ACT) vs Ic characterizations which has been successfully programmed in Basic using a Commodore PET computer. This model is described in the following sections.
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