Abstract
The enhanced phase-locked loop (EPLL) adds an amplitude estimate to the conventional phase-locked loop (PLL), which solves the problem of double-frequency disturbance in the Phase-Locked Loop mathematical model at steady state. However, there are few researches on disturbance resistance design of EPLL in complicated grid environment. Therefore, periodic disturbances of different frequencies are introduced into frequency estimation and amplitude estimation of EPLL when the grid voltage has DC offset, three-phase unbalance, high-order harmonic disturbance and sub-synchronous oscillation (SSO). This will interfere with the frequency and amplitude estimation performance of the EPLL, and then affect the closed-loop control and frequency tracking of the converter. In order to improve disturbance rejection of the EPLL. Firstly, the mathematical model of the disturbance in the frequency and amplitude loop is deduced and analyzed. Then the active disturbance rejection control (ADRC) is used to improve the EPLL. Through the simulation model of MATLAB/Simulink, the parameters of the ADRC and the ESO are compared and validated. The proposed EPLL based on ADRC is verified experimentally for the tracking performance under the frequency stability or drop in complicated power grid environment.
Highlights
In recent years, the development of primary energy and the rapid progress of power electronics technology
phaselocked loop (PLL) is a digital phase-locked loop, which is used in the detection of power grid voltage signals by PWM converters
When the input voltage is disturbed by DC offset, three-phase unbalance, high-order harmonics and subsynchronous oscillation (SSO), the accuracy of fundamental wave detection of input voltage signal is very important for power electronic devices such as PWM converter [4]–[6]
Summary
The development of primary energy and the rapid progress of power electronics technology. It consists of three parts: multiplier phase detector (PD), low pass filter (LF) and voltage controlled oscillator (VCO). It is not difficult to find that the goal of EPLL design is to eliminate the double frequency disturbance in PLL and obtain the accurate estimation of the amplitude, frequency and phase of the input signal when the system is stable. It is not difficult to find that the amplitude, phase and frequency components of the input signal can be observed independently by EPLL, which is easy to use This method of signal observation has important application value in power grid control. Where U , ω , φ, θand are the estimated values of U , ω, φ and θ through αβ-EPLL; eα and eβ are the errors between the actual value and the estimated value of uα and uβ ; μu is the integral coefficient of the amplitude estimation loop integrator; μθ and μω are the ratio and integral coefficient of the frequency estimation loop PI controller, respectively
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