An Improved Algorithm for an Efficient VLSI Implementation of Type IV DST using Short Quasi-Band Correlation Structures

Abstract

This paper introduces an improved algorithm used for an efficient VLSI implementation of type IV Discrete Sine Transform. The algorithm has a low complexity from a computational perspective and it can be implemented efficiently in parallel by using linear systolic arrays. The improved algorithm that is proposed in this paper is the key for an efficient implementation in VLSI that has a low hardware complexity, offering a high throughput, whose mapping on the linear systolic arrays is done by using a low number of I/O channels with a low bandwidth. The proposed method uses 6 short quasi-band correlations which are computational structures which can be mapped efficiently on systolic arrays that are linear, thus leading to an efficient VLSI implementation characterized by regularity, modularity and of course short interconnections offered by using the aforementioned structures