Abstract
With the explosion of portable electronic devices, power efficient processors have become increasingly important. In this paper we present a set of circuit techniques to implement a 32-bit low-power ARM processor, found commonly in embedded systems, using a six metal layer 0.18 /spl mu/m TSMC process. Our methodology is based on Clustered Voltage Scaling (CVS) and dual-V/sub th/ techniques aiming to reduce both dynamic power and static power simultaneously.
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