Abstract

This paper presents the characteristics of a silicon IC process compatible, nonvolatile memory. The basic storage element is a thin-film stripe that consists of a pair of 9-nm ferromagnetic (NiFe) layers spaced with 2.2-2.5 nm of non-magnetic Cu film. The magnetization, M, of one of the layers is pinned along the longitudinal direction of the stripe with an antiferromagnetic material (FeMn), while the M of the other layer is free to rotate. This structure is known as a spin valve. When the Ms of the pair are in the same (parallel) direction, the resistance is lower than when they are in the opposite (anti-parallel) direction by 5-8%. This property is well known as the giant magneto-resistive effect. The memory cell is made up of a storage resistor stripe and the x/y select wires, typically 100 nm thick. The current pulses in the select wires generate a vector sum of magnetic field that switches the cell state. The switching field in the longitudinal direction is lowered when a transverse field is applied. The memory cells were fabricated on thermal oxide on silicon wafers. The sputter deposition and etch process of the spin valve does not affect the leakage nor does it alter the Vt of FETs, and thus may be integrated into the metallization steps of the silicon wafer processing.

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