Abstract

AbstractThe field of computer vision is characterized by computationally intensive algorithms and techniques with strict real‐time requirements. Field programmable gate arrays (FPGAs) are based on a concurrent paradigm which allows the design of efficient hardware architectures and has positioned FPGAs as an ideal device for implementing compute‐intensive applications. For this reason, FPGA technology has had a great impact in areas such as computer vision, where one of the main objectives for researchers working in this field is to create efficient automatic object recognition systems. Therefore, the need to provide undergraduates with the necessary skills to design FPGA‐based object recognition systems is evident. With this aim in mind, it is essential that specialization courses related to the design of these systems include the required resources for the student to apply the theoretical knowledge in solving practical problems. In this article, we present a development tool designed to help students, teachers, and researchers during the design‐modeling‐implementation process of object recognition systems based on FPGAs. The proposed tool operates under a modular approach as this facilitates the working on any of the phases of a recognition system and it is considered as a hybrid because the other phases can be developed using a software language. An empirical evaluation involving undergraduates enrolled in a Computer Engineering program was conducted to create a hardware architecture for the DAISY descriptor that uses the homogeneous features of objects immersed in images to produce an efficient representation. By considering similar descriptors such as Scale‐Invariant Feature Transform (SIFT) and Histogram of Oriented Gradients (HOG), DAISY is computed by convolving orientation maps instead of using weighted sums of gradient norms, which offers the same kind of invariance at a lower computational cost for the dense case. The results obtained during such an evaluation indicated that students consider this FPGA‐based tool to be an alternative to receiving practical training on designing systems for solving problems related to the area of object recognition.

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