An Fpga Implementation of SAR Polar Format Algorithm

Abstract

In order to improve the imaging processing efficiency of two-dimensional interpolated synthetic aperture radar (SAR) polar format algorithm (PFA), the SINC interpolation based on block RAM group approach was proposed in this paper. Sampling floating point coordinates were converted to the fixed point, with the integer part of the coordinate being the address. And the echo data and the remaining fractional part were written into the block RAM group. And then we completed the addressing of the echo data and interpolation kernel coefficient in a clock. Echo data were weighted and the interpolation result was obtained. The parallel structure was easy to implement and pipeline output the result to be interpolated. Interpolation points can be down compatible, and it doesn’ t increase resource utilization. Based on the SINC interpolation polar format algorithm, the measured data are processed by FPGA, experimental SA R data of 8 KB × 16 KB points can be processed with 1. 78 s when the system operating frequency is 200 MHz, which verifies the validity of the scheme.