Abstract
The Image Space Reconstruction Algorithm (ISRA) has been used in hyperspectral imaging applications to monitor changes in the environment and specifically, changes in coral reef, mangrove, and sand in coastal areas. This algorithm is one of a set of iterative methods used in the hyperspectral imaging area to estimate abundance. However, ISRA is highly computational, making it difficult to obtain results in a timely manner. We present the use of specialized hardware in the implementation of this algorithm, specifically the use of VHDL and FPGAs in order to reduce the execution time. The implementation of ISRA algorithm has been divided into hardware and software units. The hardware units were implemented on a Xilinx Virtex II Pro XC2VP30 FPGA and the software was implemented on the Xilinx Microblaze soft processor. This case study illustrates the feasibility of this alternative design for iterative hyperspectral imaging algorithms. The main bottleneck found in this implementations was data transfer. In order to reduce or eliminate this bottleneck we introduced the use of block-rams (BRAMS) to buffer data and have data readily available to the ISRA algorithm. The memory combination of DDR and BRAMS improved the speed of the implementation. Results demonstrate that the C language implementation is better than both FPGA's implementations. Nevertheless, taking a detailed look at the improvements in the results, FPGA results are similar to results obtained in the C language implementation and could further be improved by adding memory capabilities to the FPGA board. Results obtained with these two implementations do not have significant differences in terms of execution time.
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