An FPGA implementation of ATA Host Controller toward scalable iATA NAS

Abstract

Each business and organization owns an excessive amount of corporate data. Therefore, Storage Area Network (SAN) is built to support the need of data storage over the network. However, it is not worthy for Small Office, Home Office (SOHO) and small businesses to invest on the high-cost SAN system. Therefore, the implementation of Advanced Technology Attachment (ATA) Device Host Controller to support internet Advanced Technology Attachment (iATA) Protocol for ATA Network Attached Storage (NAS) is introduced to enable the capability to read data from and write data to ATA Device over the existing network. In this paper, we have implemented ATA Device Host Controller which supports a iATA application layer protocol on Field Programmable Gate Arrays (FPGA) to enable the data transfer over the internet. On the FPGA, we have implemented a module for each of the internet layer protocol, which are 1) 10/100 Ethernet MAC Module for the Physical and the Data Link Layer 2) IP header de/encapsulation Module for the Network Layer 3) TCP header de/encapsulation Module for the Transport Layer 4) iATA Controller Module for the Application Layer, and a Disk Controller Module for the read/write operations to a hard disk. These modules operate sequentially. As a result of the implementation, the experiment shows that our prototype systems can operate the read operation with the average speed of 1250 KB/sec and the write operation with the average speed of 1170 KB/sec. The experiment also shows that there is a clock frequency limitation in the implementation.