Abstract

As computational and functional brain model development are solely dependent upon the data acquired from the neural interface, this device plays a vital role in both prosthetic developments and neurological experiments. A wireless neural interface is preferred over a traditional wired one because it can maximize the comfort of the subject and ensure the freedom of movement while implemented. This paper describes the field programmable gate array (FPGA) prototype design of a low-power multichannel neuron activity extraction unit suitable for a wireless neural interface. To achieve the low-power requirement, we proposed a novel neural signal extraction algorithm which can provide an up to 6000X transmission rate reduction considering the input signal. Consequently, this technique offers at least 2X power reduction compared to the state-of-the-art systems. We implemented this scheme in Xilinx Zynq-7000 FPGA, which can be used as an intermediate transition towards the application specific integrated circuit (ASIC) design for on-chip neural signal processing. The proposed FPGA prototype offers reconfigurable computability, which means the model can be modified and verified according to prerequisites before the final ASIC design. This prototype consists of a signal filtering unit and a signal extraction unit which can be used either as stand-alone units or combined as a complete system. Our proposed scheme also provides a provision to work as a single-channel or a scalable multichannel interface based on user’s demands. We collected practical neural signals from rat brains and validated the efficacy of the implemented system using in-silico signal processing.

Highlights

  • A neural interface is used for gaining access to the brain’s circuits

  • The wireless neural interface is suitable for preclinical experiments with nonhuman behaving animals [10,11,12,13]

  • We have used the development board ZedBoard for the implementation of our design. This board utilizes Xilinx Zynq-7000 SoC as the field programmable gate array (FPGA) chip for signal processing. We present this FPGA prototype design, and we checked in different configurations which intermediary platform can be converted into an application specific integrated circuit (ASIC) according to specific user demands

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Summary

Introduction

A neural interface is used for gaining access to the brain’s circuits. It creates a direct information pathway between the brain and the outside world [1] as a gateway component of neural devices.With the recent drastic advancement in experimental neuroscience, the neural interface is becoming sophisticated and miniaturized [2,3,4,5,6]. A neural interface is used for gaining access to the brain’s circuits. It creates a direct information pathway between the brain and the outside world [1] as a gateway component of neural devices. The longer-term procedure especially requires miniaturized and wireless devices to ensure patients’ comfort and flexibility [7,8,9]. The wireless neural interface is suitable for preclinical experiments with nonhuman behaving animals [10,11,12,13]. The wireless nature of the experiment ensures untethered movement during the procedure [14]; more naturalistic brain signal recording is possible

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