Abstract

Spacecraft takes images for applications/missions like attitude determination, astronomy, and space situational awareness. Feature detection is a primary operation in vision-based processing systems. Although different feature detection algorithms are used for specific purposes, they need to achieve invariance by scaling, rotation, and other interference, and output robust results. This article develops a general-purpose feature detection hardware architecture based on the speeded-up robust features (SURF) algorithm. On the other hand, the efficiency of the algorithm can affect the overall system performance to a large extent, especially in real-time operations. This article presents an field-programmable gate array (FPGA)-based implementation of a modified SURF algorithm. The advantages of FPGAs including parallel and pipelining, fixed-point arithmetic, and bitwise operations are fully applied to improve the performance and efficiency of the system in terms of power consumption, and resource utilization.

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