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Abstract
Fourier Descriptors (FD) can be used as feature vector components in various applications, such as real-time color object recognition or image retrieval. The full process is composed of the feature extraction followed by a classification step performed using support vector machine (SVM). In order to accelerate the computation of FD, a hardware implementation using FPGA technology is presented in this paper. We evaluated classification performance with respect to lighting variations and noise sensibility. Several experiments were carried out on three databases. Then an efficient architecture for FD computation on FPGAs is proposed and designed as accelerator. The WildCard is used to prototype this implementation. This design can have an operation speed up of approximately 10 compared to the standard software PC implementation.
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