Abstract
This intelligent and automatic chip apportioning system supports the design engineer during the implementation phase of amicrocomputer based system. It frees him from the tedious work of counting basic cells and pins and gives him a number of alternative proposals. The verification of the implementation proposal is done automatically. Thus the designer has more time to look for an optimal solution. The system can be easily adapted to future technologies by expanding the knowledge base. In the future the output of the system may be used as an input to a silicon compiler.
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