Abstract
An experimental 2-bit/cell storage DRAM for macro cell or memory-on-logic application: T Furuyama, T Ohsawa (Toshiba Corp., Kawasaki, Japan), Y Nagahama, H Tanaka, Y Watanabe, T Kimura, K Muraoka, K Natori Proceedings of the IEEE 1988 Custom Integrated Circuits Conference (Cat. No. 88CH2584-1), Rochester, NY, USA, 16–19 May 1988 (New York, NY, USA: IEEE 1988), pp. 4.4/1–4
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