AN EXAMPLE OF CALCULATION OF A FAULT TREE WITH LOGIC LOOPS

Abstract

Aim. In the course of fault tolerance analysis of complex technical systems using the method of fault tree-based methods, logic loops may occur when, from the point of view of fault tree structure, the system sustains itself. The recursion in the fault tree structure disrupts the logical equation and does not allow performing the calculation and associated analysis. A complex system is understood as one performing a multitude of functions, fault tolerant through a number of redundancy techniques, having intersystem communications and high level of integration of hardware and software components. This paper looks into a particular case of solving the problem of logical recurrence of a fault tree that occurred during an aircraft’s power supply system analysis for compliance with airworthiness requirements and aviation regulations.Method. The paper reviews known ways of solving the set task (both manual and automatic), describes the advantages and disadvantages, applicability and ultimately provides a comparative evaluation based on the results of calculation of occurrence probability of certain aircraft power supply system failures. The method of solving the problem of fault tree recurrence presented in this paper is based on identifying recursive elements in the tree’s structure with subsequent reduction of the cyclic connections to a converging spiral by modelling the initial state of the analyzed system.Results. The calculation of the fault tree under consideration is performed both by means of the method presented in this paper, and the most applicable in the particular case known methods of resolving recurrence. Additionally, comparative results of calculation of other special situations are shown. They are not considered in this paper but demonstrate the distinctive features of different methods. The calculations show that the methods yield the most diverging results in cases when the system is redundant and has feedbacks.Conclusions. The method presented in the paper has been tested as part of an aircraft’s power supply system fault tolerance analysis. The developed method in some cases enables manual resolution of the logic loop problem in the fault tree without a significant increase of computational resources while preserving the analytical solution (minimum fault tree cross sections). On the other hand, this solution may cause a fast growth of the fault tree size in cross-system analysis. In special cases, antithetical events like «operability» and «failure» may become mixed-up in the fault tree structure, which will entail the requirement to use complementary operator inversion and subsequently a manifold increase of the computation time. Another limitation of the method may stem from situations when it is impossible to identify the «initial» and «normal» states of the system under analysis. Given the above, the author classifies the presented method as an engineering method of limited applicability.