An evolutionary algorithm based approach for optimal design of low power CMOS two-stage comparator

Abstract

This work presents an evolutionary approach to design CMOS Two-Stage Comparator (TSC) using simplex particle swarm optimization (Simplex-PSO) method. It is a swarm intelligent based evolutionary computation method. Simplex-PSO is the hybridization of Nelder-Mead Simplex method (NMSM) and Particle Swarm Optimization (PSO) without the velocity term. It has focused on the optimization of the area, power and has improved all other performance parameters of the CMOS two-stage comparator with minimum computational time. The proposed Simplex-PSO based circuit optimization technique is relieved from the inherent drawbacks of premature convergence and stagnation, unlike Differential Evolution (DE), Harmony Search (HS). The simulation results prove that Simplex-PSO yields optimally designed two-stage comparator circuit which occupies the least MOS area and dissipates the least power. It provides better results than those of the reported works. Simulation is carried out by Cadence spectra circuit simulator using 0.35μm technology.