An Energy-Efficient Directory Based Multicore Architecture with Wireless Routers to Minimize the Communication Latency

Abstract

Multicore architectures suffer from high core-to-core communication latency primarily due to the cache's dynamic behavior. Studies suggest that a directory-approach can be helpful to reduce communication latency by storing the cached block information. Recent studies also indicate that a wireless router has potential to help decrease communication latency in multicore architectures. In this work, we propose a directory based multicore architecture with wireless routers to minimize communication latency. We simulate systems with mesh (used in the Standford Directory Architecture for SHared memory (DASH) architecture), wireless network-on-chip (WNoC), and the proposed directory based architecture with wireless routers. According to the experimental results, our proposed architecture outperforms the WNoC and the mesh architectures. It is observed that the proposed architecture helps decrease the communication delay by up to 15.71 percent and the total power consumption by up to 67.58 percent when compared with the mesh architecture. Similarly, the proposed architecture helps decrease the communication delay by up to 10.00 percent and the total power consumption by up to 58.10 percent when compared with the WNoC architecture. This is due to the fact that the proposed directory based mechanism helps reduce the number of core-to-core communication and the wireless routers help reduce the total number of hops.