An energy-efficient reconfigurable analog-to-digital converter for orthopedic implants

Abstract

This paper presents a pipelined analog to digital converter (ADC) with reconfigurable resolution and sampling rate for biomedical applications. Significant power saving is achieved by turning off the sample-and-hold stage and the first two pipeline stages of the ADC instead of turning off the last two stages. The reconfiguration scheme allows having three modes of operation with variable resolutions and sampling rates. Reconfigurable operational transconductance amplifiers and an interference elimination technique have been employed to optimize power-speed-accuracy performance in biomedical instrumentation. The proposed ADC exhibits a 56.9 dB SNDR with 35.4 mW power consumption in 10-bit, 40 MS/s mode and 49.2 dB SNDR with only 7.9 mW power consumption in 8-bit, 2.5 MS/s mode. The area of the core layout is 1.9 mm2 in a 0.35 μm bulk-CMOS process.