Abstract
In this work, a ReRAM-based energy-efficient CIM accelerator is presented with two techniques for edge AI applications. Firstly, a circuit-algorithm co-design scheme is proposed to realize fully analog processing, which improves the energy efficiency and the throughput of neural network. To deal with the I-V nonlinearity of ReRAM, a nonlinear-aware training algorithm is proposed to improve the network accuracy. Secondly, a 1T2R cell is proposed to replace previous 2T2R for weight storage with 35% area saving. For evaluation, a neural network with two fully connected layers and one ReLU layer is built for the MNIST dataset. The error rate can be reduced by >46% and the energy efficiency is 99 TOPS/W@200 MHz, 2.6X improvement over the digital method.
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More From: IEEE Transactions on Circuits and Systems II: Express Briefs
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