Abstract
In this paper, we propose an efficient VLSI architecture for a new three-step search (NTSS) algorithm that is superior to the existing three-step search (TSS) algorithm. By appropriately organizing the checking points into checking-vectors, the regularity of data flow is exploited and the architecture based on 1-D systolic arrays is proposed. Because of the intrinsic characteristic of high-throughput, the proposed architecture can provide efficient solutions for a wide range of video applications.
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