Abstract

In this article a forsaken sine approximation formula by a seventh century Indian mathematician is introduced and by simulation via MATLAB, the formula is then incorporated into a Direct Digital Frequency Synthesizer (DDS or DDFS). An incredible worst case spurious free dynamic range (SFDR) of about 60 dBc is obtained for a typical DDS which comprises a 32-bit accumulator, from which only the 12 MSB's are used, and no Read Only Memory (ROM). When compared to that of ROM-less parabolic approximation, the proposed system shows a worst case SFDR improvement of at least 30 dBc. A computer simulation also shows that a simplified version of the proposed DDS system with only 5-bit registers could have the same performance as the ROM-less parabolic approximation system with the typical 12-bits registers.

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