Abstract

This paper describes an improved immersion-based watershed algorithm to compute the watershed lines for segmentation of digital gray scale images and its hardware implementation. The proposed algorithm is devoid of certain disadvantages inherent in a conventional immersion-based algorithm originally proposed by Vincent and Soille. Flooding of catchment basins from pre-determined regional minima and conditional neighborhood comparisons while processing the eight neighboring pixels of a labeled center pixel ensures thin continuous watershed lines. Reduced computational complexity and increased throughput compared to the conventional algorithm occurs from simultaneous determination of labels of various neighboring pixels. The complexity of the proposed algorithm is analyzed. The results of running both the proposed and the conventional algorithm on different test images clearly establish the superiority of the proposed algorithm. A prototype architecture designed to implement the proposed watershed algorithm has been modelled in VHDL and synthesized for Virtex FPGA. The FPGA implementation results show acceptable performance of the proposed architecture.

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