An Efficient High-Throughput Generic QAM Transmitter with Scalable Spiral FIR Filter

Abstract

The need for efficient Finite Impulse Response (FIR) filters in high-speed applications such as telecommunications targets Field Programmable Gate Arrays (FPGAs) as an effective and flexible platform for digital implementation. Although FIR filter offers many advantages, its convolution nature poises a challenge in parallelization due to data dependency and computational complexity. To resolve this, we propose a novel FPGA-based reconfigurable filter architecture, which processes several data samples in parallel and breaks down data interdependency in a spiral fashion. Experimental results show a throughput of 7.2[Formula: see text]GSPS with an operating frequency of only 450[Formula: see text]MHz for a filter length of 11 with 16 parallel inputs. With parallelization of 4, it is 4.44 times faster than the state-of-the-art solution for a filter length of 16 and a promising 1.04[Formula: see text]GSPS throughput is achieved for a higher order of length 61. Incorporated into a generic Quadrature Amplitude Modulation (QAM) transmitter fitted with Forward Error Correction technique, a maximum throughput of 23[Formula: see text]Gb/s is achieved by the system for processing 16 input samples in parallel. In comparison to the state-of-the-art mixed domain approach, a threefold performance gain, while utilizing comparatively less Look-up Tables (LUTs), registers and DSP48 slices with an average gain factor of 43.3[Formula: see text], 4.7[Formula: see text] and 3.9[Formula: see text], respectively, is accomplished.