Abstract
The efficient and precise hardware implementations of tanh and sigmoid functions play an important role in various neural network algorithms. Different applications have different requirements for accuracy. However, it is difficult for traditional methods to achieve adjustable precision. Therefore, we propose an efficient-hardware, adjustable-precision and high-speed architecture to implement them for the first time. Firstly, we present two methods to implement sigmoid and tanh functions. One is based on the rotation mode of hyperbolic CORDIC and the vector mode of linear CORDIC (called RHC-VLC), another is based on the carry-save method and the vector mode of linear CORDIC (called CSM-VLC). We validate the two methods by MATLAB and RTL implementations. Synthesized under the TSMC 40 nm CMOS technology, we find that a special case AR∣VR(3,0), based on RHC-VLC method, has the area of 4290.98 μm2 and the power of 1.69 mW at the frequency of 1.5 GHz. However, under the same frequency, AR∣VC(3) (a special case based on CSM-VLC method) costs 3196.36 μm2 area and 1.38 mW power. They are both superior to existing methods for implementing such an architecture with adjustable precision.
Highlights
Artificial neural networks (ANNs) are widely used in the applications of pattern recognition, image classification, biological systems and so on [1]
We propose a hardware architecture with adjustable precision and extensible input range to implement tanh and sigmoid functions, which is based on the RHC-VLC method
We find that the order of magnitude of average absolute error (AAE) and maximum absolute error (MAE) keeps the same for both hardware implementation and software validation
Summary
Artificial neural networks (ANNs) are widely used in the applications of pattern recognition, image classification, biological systems and so on [1]. Its accuracy can not be very high because it is limited by the chosen range It is difficult for each of the above methods to achieve all the advantages of computing tanh and sigmoid functions: high hardware efficiency, adjustable precision, extensible input range, and high computation speed. If we use these methods to build such an hardware architecture, they will be very costly. We propose a hardware architecture with adjustable precision and extensible input range to implement tanh and sigmoid functions, which is based on the RHC-VLC method.
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