An efficient fault-tolerant arithmetic logic unit using a novel fault-tolerant 5-input majority gate in quantum-dot cellular automata

Abstract

This paper proposes a novel fault-tolerant 5-input majority gate using 28 simple and rotated cells in Quantum-dot Cellular Automata (QCA) technology. The proposed gate is evaluated against cell omission, extra-cell deposition, and cell displacement defects to check the stability. The simulation results using QCADesigner 2.0.3 software show that the proposed gate is 59% and 100% fault-tolerant against single-cell omission and extra-cell deposition defects, respectively. It also shows good tolerance against cell displacement defects. Moreover, the functionality of the proposed structure is confirmed by physical proofs. QCAPro tool is used to analyze the power consumption of the proposed structure. Fault-tolerant versions of basic gates including 2-input AND, 2-input XOR, and 3-input XOR are suggested using the proposed gate. Moreover, a fault-tolerant 2:1 multiplexer, a 4-bit even parity generator, and an Arithmetic Logic Unit (ALU) are developed and implemented using the proposed fault-tolerant basic gates.