An Efficient Design Procedure to Implement the Fractional-Order Chaotic Jerk Systems with the Programmable Analog Platform

Abstract

An effective design procedure has been introduced for implementing the fractional order integrator structures with a modified low pass filters (LPFs) and its functionality is verified by realizing a fractional-order chaotic system. In these applications, the state variables of the fractional-order Sprott’s Jerk system are emulated by these first order LPFs. Since the discrete device based designs have the hard adjustment features and the circuit complexities; the realizations of these LPFs are carried out with the Field Programmable Analog Arrays (FPAAs), sensitively. Hence, the introduced LPF based method has been applied to the fractional order Sprott’s Jerk systems and these fractional-order systems, which are built by the several nonlinear functions, have been implemented with a programmable analog device. In this context, the minimum fractional-orders of the Sprott’s Jerk systems are calculated by considering the stability of the fractional-order nonlinear systems. After that, these systems are simulated by employing the Grünwald-Letnikov (G-L) fractional derivative method by using a common fractional-order. Thus, the stability analyses of the fractional-order Sprott’s Jerk system are supported by the numerical simulation results. After the numerical simulation stage, the design procedures of the FPAA based implementations of the Sprott’s Jerk systems have been dealt with in detail. Finally, thanks to the introduced first-order LPF method, the hardware realizations of the Sprott’s Jerk systems have been achieved successfully with a single FPAA device.