An Efficient Cmos Mixed Signal Demodulator in 90Nm Process

Abstract

This paper emphasizes on the design of a fully integrated low-power mixed-signal demodulator for multi-gigabit operations in 90 nm CMOS technology. A 3-bit ADC can be used to convert the analog inputs to digital form. But these baseband ADC's experience clipping distortions. This can be reduced by employing wide automatic gain control (AGC). The front-end of the system includes IQ mixers, a QVCO, frequency synthesizer, and AGC. This constitutes the analog block of the demodulator. AGC consists of Variable Gain Amplifier (VGA), power detector circuit, Differential to single ended amplifier and Operational amplifier. 6-bit current steering DAC is used to digitally control the output power of VGA. In order to recover OOK modulated signals, the analog signal processor (ASP) is used. This paper focuses on the design of fully integrated receiver consisting of broadband demodulator with embedded analog and digital signal processors in deep-submicron CMOS technology.