An efficient adder/subtracter circuit for one-hot residue number system

Abstract

Residue number system (RNS) is an appropriate system for fast and parallel arithmetic operation. This speed increases if one-hot residue (OHR) number system is used. There are problems in OHR with area and hardware consumption, when modules are large or result of various arithmetic operations is needed. In this paper, a new design for concurrent add and subtract operation in OHR systems, using barrel shifter structure is proposed. This design is extended to include the even and odd modules of a RNS system. For add/subtract operation in this paper, Presented design generates the addition and subtraction of two parameters synchronously in a one-hot circuit which its hardware is in the order of (m+1) <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , compare to original 2m. <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> it means that the amount of hardware in the proposed circuit is half of conventional structure that used two barrel shifters.