Abstract
This paper presents new parallel strategies for preprocessing and solving the issue of Boolean Satisfaction (SAT) on Heterogeneous systems of multicore and many-core CPU and Graphics Processing Unit (GPU) using Open Multi-Processor (OpenMP) and NVIDIA - CUDA. We propose exceptionally proficient and parallel techniques for SAT simplifications using the variable elimination method based on the Davis-Putnam-Logemann-Loveland (DPLL) slitting rule algorithm performed with a shared-memory model on a multicore CPU platform, where the clause elimination subsumption and the pure-literal removal techniques are completely performed on the CUDA framework. We demonstrate how efficient an evolutionary SAT solver is by using the suggested heterogeneous pre-processing, leading to important acceleration improvements in the solution's quality enhancement. The penalization of the transformative SAT solver is executed with Ant Colony Optimization (ACO) scheme utilizing CUDA. (Compute Unified Device Architecture) We perform thorough benchmarks to test the performance of our preprocessor and solver implementations against various random SAT formulas. The promoted H-SAT pre-processor scheme has gotten a speed-up of a factor 15x over the sequential implementation with statistical reductions on the original CNF which becomes up to 49% and 43% in case of literals and clauses numbers exclusively, where the H-SAT gain strength the solvability of the ACO solver by 100% in some cases.
Highlights
For a multitude of reasons, interest in Boolean satisfaction is growing as more issues are being solved more quickly by SAT solvers over others
Our suggested H-SAT preprocessor uses Open Multi-Processor (OpenMP) to display a skilled variable removal method [42], [43] to make full use of the multicore CPU based on a sharedmemory model and notable quick parallel subsumption algorithms and pure-literal elimination architecture based on VOLUME 8, 2020 (Single-Instruction Multiple Thread) SIMT shared-memory architecture for complete Graphics Processing Unit (GPU) operation with CUDA
We have developed a variable elimination technique that executes the SAT factoring exhausting the most constrained variables of a SAT formula on the CPU’s multicore architecture
Summary
For a multitude of reasons, interest in Boolean satisfaction is growing as more issues are being solved more quickly by SAT solvers over others. A master sends more work to the slaves while no solution is found or while there are sub-formulae to be solved The latter introduces a 3-SAT solver that uses CUDA to adopt a deterministic strategy implemented on the GPU. Our suggested H-SAT preprocessor uses OpenMP to display a skilled variable removal method [42], [43] to make full use of the multicore CPU based on a sharedmemory model and notable quick parallel subsumption algorithms and pure-literal elimination architecture based on VOLUME 8, 2020. The primary enrichment of this article is to use variable elimination, subsumption and pure-literal cuts on the CPU-GPU system using the parallel SIMD architectures to achieve a fine-simplified SAT CNF that is proper for our solver utilizing the Max-Min Ant System (MMAS) method to SAT solving [44]–[47], requiring trivial formulas to be processed
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