An E-Band CMOS Frequency Quadrupler with 1.7-dBm Output Power and 45-dB Fundamental Suppression

Abstract

This paper presents an E-band frequency quadrupler, utilizing two push-push frequency doublers and two single-stage neutralized amplifiers. The pseudo-differential class-B biased cascode topology is adopted for frequency doubler, which improves the reverse isolation and conversion gain. Two amplifiers are designed based on neutralization technique, which increases the stability and power gain simultaneously. The stacked transformers are used for power matching and single-ended-to-differential transformation. Fabricated in 40-nm CMOS, the measurement results show a maximum output power and conversion gain of 1.7 dBm and 3.4 dB, respectively at 76 GHz. Fundamental and 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> -harmonic suppressions of better than 45 dB and 20 dB are achieved over the desired bandwidth.