Abstract
Information security is fundamental to the Internet of things (IoT) devices, in which security chip is an important means. This paper proposes an Advanced High-performance Bus Slave Control IP (AHB-SIP), which applies to cryptographic accelerators in IoT security chips. Composed by four types of function registers and AHB Interface Control Logic (AICL), AHB-SIP has a simple and easy-to-use structure. The System on Chip (SoC) design can be realized by quickly converting the nonstandard interface of the security module to the AHB slave interface. AHB-SIP is applied to the security accelerators of SM2, SM3, and SM4 and random number generator (RNG). Combined with a low-power embedded CPU, TIMER, UART, SPI, IIC, and other communication interfaces, a configurable SoC can be integrated. Moreover, SMIC 110 nm technology is employed to tape out the SoC on a silicon chip. The area of AHB-SIP is 0.072 mm2, only occupying 6‰ of the chip (3.45 ∗ 3.45 mm2), and the power consumption of encryption modules combined with AHB-SIP is lower than that combined with AXI interface, which is decreased up to 61.0% and is ideal for the application of IoT.
Highlights
Introduction eInternet of things (IoT) is a network system that is extended and expanded on the Internet and connects people, devices, and servers
In the AdvancedMicrocontroller Bus Architecture (AMBA), the Advanced High-performance Bus (AHB) is an advanced high-performance bus, and AXI focuses on the advanced extensible interface. e bus latency in AHB is lower than that of AXI, and the AHB bus is used more frequently than AXI
E goal of our design is to develop an efficient and lowpower consumption information security chip that can be used for various intelligent hardware platforms and smart home devices. e structure of this chip requires only one master device, which mainly focuses on high-performance and low-power System on Chip (SoC) design
Summary
Introduction eIoT is a network system that is extended and expanded on the Internet and connects people, devices, and servers. Shorter life cycles of products can significantly reduce the time-to-market and rapid simulation capabilities are necessary with the increase of the design space at the early stages of design [4]. In this regard, this study focuses on the design of a highly efficient, low-power, and easy-integrated IP interface and integrated crypto modules. E AMBA 2.0 bus standard defines three kinds of buses: the Advanced High-performance Bus (AHB), the Advanced System Bus (ASB), and the Advanced Peripheral Bus (APB) [18]. Among the AMBA systems, the most widely used buses are the AHB and the APB. e AHB-Lite bus is simplified based on the AHB, where the
Sign-in/Register to view highlights & summary Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
