Abstract
A receiver optoelectronic integrated circuit (OEIC) with integrated PIN photodiode, an automatic gain control transimpedance amplifier, linear post amplifier and 50 ¿ line driver is presented. Two ICs were designed using 0.6 ¿m BiCMOS technology. One with 760 mV differential output voltage and 623 MHz bandwidth, the other IC has a 420 mV differential output voltage and 712 MHz bandwidth. The post-layout simulation for this optical receiver for multi-level data signals shows a high linearity. The eye diagram of the multi-level signal at a symbol rate of 1.25 Gbaud demonstrates an excellent performance for the optical receiver. The experimental measurement with a binary signal at a bit rate of 1.25 Gb/s indicates that the front-end optical receiver has for 660 nm a sensitivity of -24 dBm for a bit error rate of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-9</sup> . The reached 10%-90% rise- and fall-times are 0.42 ns and 0.40 ns, respectively.
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